CDE: A Compiler-driven, Dependence-Centric, Eager-executing Architecture for the Billion Transistors Era

We propose an evolutionary new approach to high-performance processor architectures that can scale to use increasing numbers of transistors while meeting the constraints of design complexity, wire lengths, and power management. The fundamental idea is to make the architecture and the micro-architecture dependence-centric, in contrast to prior instruction-centric and trace-centric processors. We rely on the compiler for much of the program partitioning and parallel execution management, thus creating a compiler driven dependence architecture (CDE). Complexity-effective high performance is achieved via hierarchical program partitioning and matching hierarchical hardware. The compiler partitions program binaries into “horizontal” control epochs (structures such as super-blocks, nested loops, etc.) that in turn contain several “vertical” dependence clusters (DCs). The CDE hardware consists of a cluster of simple single-issue cores that execute individual DC threads, and a special epoch processor core (EPC) that fires up these DC threads by processing the higher-level epochs. The EPC uses hardware support to speculatively sequence through and quickly process the epochs, whereas within each epoch, the compiler handles all ILP meta-operations such as rename, squash, redo, commit, etc. in software, in a distributed fashion on the processing element cluster. The compiler enhances ILP and communication locality by employing VLIW-style trace scheduling and selective eager execution within an epoch. Several benefits can accrue from the combination of features in CDE, with regard to complexity effectiveness, lower ILP overheads, efficient exposure of far-flung ILP, reduced branch mis-prediction penalty, scalability to match resources, etc.